Mixed Signal Logic Design Engineer

Develop mixed-signal IP by creating RTL code and simulation models that support cell libraries, functional units, and subsystems for full chip integration. Participate in defining architecture and microarchitecture, optimize mixed-signal logic to meet power, performance, area, and timing goals, and ensure design integrity through the RTL-to-physical flow. Review verification plans, resolve failing RTL tests, and support SoC customers with high-quality IP integration.