Senior Member of Technical Staff / Member of Technical Staff, DRAM Design Engineer, Next-generation HBM Architecture
Texas
Workplace: OnsiteFull timeFunction: Architecture & Urban PlanningExperience: 8+ yearsEducation: mastersSkills: ["Communication","Technical analysis","Data-driven influence"]Design and optimize next-generation 3D-stacked DRAM for high-bandwidth memory (HBM) used in emerging AI systems. You’ll architect and validate novel DRAM circuit approaches, run schematic and SPICE simulations to assess power/performance/area tradeoffs, and collaborate with layout, test, and yield teams. Maintain clear architecture documentation and partner across stack, memory systems, and SoC microarchitecture experts to deliver performance and efficiency improvements.
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