Staff Analog Layout Design Engineer

AMD
Penang
Workplace: OnsiteFull timeMYR 126,000 - 180,000 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Teamwork","Problem-solving","Verilog","Systemverilog","C","Cpp","Uvm","Testbenches","Linux","Windows","Scripting","Make","Perl","Ruby"]

Plan, build, and execute verification for AMD’s graphics processor IP features, ensuring bug-free final designs. Collaborate with architects, hardware and firmware teams across sites/timezones, develop test plans and verification strategies, and drive tests from development through debugging in a distributed environment.

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FursaFursa
AMD
AMD
2 months ago

Staff Analog Layout Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 10 hours agoStatus: Live

Job Summary

Plan, build, and execute verification for AMD’s graphics processor IP features, ensuring bug-free final designs. Collaborate with architects, hardware and firmware teams across sites/timezones, develop test plans and verification strategies, and drive tests from development through debugging in a distributed environment.
Location: Penang
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand the features to be verified.
  • •Build test plan documentation, accounting for interactions with other features, hardware, firmware, and software driver use cases.
  • •Estimate the time required to write new feature tests and any changes to the test environment.
  • •Develop and maintain directed and random verification tests and verify testbenches in a distributed compute environment.
  • •Debug test failures to determine root causes; work with RTL and firmware teams to resolve defects and correct test issues.

Pay and Benefits

Salary: MYR 126,000 - 180,000 annually

Key Requirements

  • •Proficient in IP-level ASIC verification with strong background in Verilog, SystemVerilog, C and C++.
  • •Excellent knowledge of UVM-based verification frameworks, testbenches, and test plan development.
  • •Experience debugging firmware and RTL code using simulation tools; strong problem-solving skills.
  • •Proficient in Linux and Windows environments; familiarity with scripting (Perl, Ruby, Makefile, shell).
  • •Bachelor’s or Master’s degree in computer engineering/electrical engineering; strong collaboration across teams and timezones.
Experience:SemiconductorsHardwareIP verificationASIC
Education:Bachelor's
Skills:CommunicationTeamworkProblem-solvingVerilogSystemverilogCCppUvmTestbenchesLinuxWindowsScriptingMakePerlRuby
Languages:English
Tech Stack:VerilogSystemVerilogCC++UVMLinuxWindowsPerlRubyMakefile

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn