IP Validation Design Engineer
AMD
Vancouver
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Ruby","Python","PCIe","CXL","UALINK","Oscilloscopes","Logic analyzers"]Join AMD’s NBIO team as an IP Validation Design Engineer to drive planning, validation, and debugging of hardware IP across upcoming AMD SOC programs. Collaborate across DV, diagnostics, emulation and software/hardware modeling teams, create test plans, and push pre-silicon shift-left validation with cross-functional initiatives in a hybrid Vancouver-based role.

