DFT Intern
Etched
San Jose
Workplace: OnsiteInternshipFunction: Healthcare (Clinical, Medical, Wellness)Education: bachelorsSkills: ["Verilog","SystemVerilog","Python","Tcl","Digital logic design","ASIC design flow (synthesis, STA, DFT)","Clocking and reset schemes"]DFT Intern at Etched helps review and refine DFT flow automation to support chip-level regression on Caelius. You’ll work across frontend and backend design teams, contribute to DFT verification (MBIST, Scan, BSCAN, SSN simulations), and develop flows for ATPG fault models in a fast-paced, high-autonomy environment.
