Technology Development Quality and Reliability Engineer

Intel
United States
Workplace: OnsiteFull timeUSD 155,520 - 219,550 annuallyFunction: Quality & Regulatory (Non-Software)Experience: 3+ yearsEducation: mastersSkills: ["Analyzing data","Consulting","Planning","Documentation","Experimentation"]

Develop and validate Electrostatic Discharge (ESD) and latch-up reliability solutions, including design rules that reduce ESD risk in analog circuits. Build and execute test structure plans, perform transmission line pulse (TLP) characterization, and analyze experimental data during technology development. Document and publish reliability design rules, and consult with internal and foundry design teams to ensure ESD reliability requirements are met.

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FursaFursa
Intel
Intel
4 days ago

Technology Development Quality and Reliability Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live
Reposted: similar role first listed 4 months ago

Job Summary

Develop and validate Electrostatic Discharge (ESD) and latch-up reliability solutions, including design rules that reduce ESD risk in analog circuits. Build and execute test structure plans, perform transmission line pulse (TLP) characterization, and analyze experimental data during technology development. Document and publish reliability design rules, and consult with internal and foundry design teams to ensure ESD reliability requirements are met.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Quality & Regulatory (Non-Software)
Seniority: Mid level

Key Responsibilities

  • •Develop solutions and design rules to ensure ESD and latch-up reliability in circuits.
  • •Design test structures and run experiments during the technology development phase.
  • •Perform ESD characterization on test structures using transmission line pulse (TLP).
  • •Analyze experimental data to support technology development and reliability decision-making.
  • •Develop, document, and publish design rules; consult design teams to address ESD risks in analog circuits.

Pay and Benefits

Salary: USD 155,520 - 219,550 annually
Equity and Bonus:Equity
Perks:Health InsurancePaid Leave

Key Requirements

  • •Master's degree in Electrical Engineering, Reliability Engineering, Physics, or a related technical field.
  • •3+ years of experience in ESD or LU reliability engineering.
  • •3+ years of experience with device physics and device characterization, with basic VLSI design knowledge.
  • •Deep understanding of transistor device characteristics and characterization methods.
  • •Experience with transmission line pulse (TLP) measurement and/or ESD models (CDM, HBM).
Experience:3+ yearsESDLatch-upReliability engineeringDevice physicsVLSI
Education:Master's in Electrical Engineering, Reliability Engineering, Physics, or related technical field
Skills:Analyzing dataConsultingPlanningDocumentationExperimentation
Tech Stack:Electrostatic Discharge (ESD)Latch-up (LU)Transmission line pulse (TLP)TLPDevice physicsVLSIAnalogDigitalTest structuresCDMHBMJMPExcel

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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