Packaging Process Engineer - Singapore

ByteDance
Singapore
Workplace: OnsiteFull timeFunction: Product ManagementExperience: 2+ yearsEducation: mastersSkills: ["Teamwork","Responsible work attitude","Communication","English proficiency"]

Work with the Silicon Platform team to deliver chip packaging design solutions end-to-end, from packaging selection and implementation to PinMap definition and board-level interconnection. Tackle signal integrity (SI) and power integrity (PI) analysis and optimization for complex SoC chips, including high-speed interfaces like DDR, PCIe, and Serdes. Partner with chip and board-level designers to resolve interface issues and support R&D progress through tape-out and mass production readiness.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
ByteDance
ByteDance
1 month ago

Packaging Process Engineer - Singapore

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 29 days agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Work with the Silicon Platform team to deliver chip packaging design solutions end-to-end, from packaging selection and implementation to PinMap definition and board-level interconnection. Tackle signal integrity (SI) and power integrity (PI) analysis and optimization for complex SoC chips, including high-speed interfaces like DDR, PCIe, and Serdes. Partner with chip and board-level designers to resolve interface issues and support R&D progress through tape-out and mass production readiness.
Location: Singapore
Workplace: Onsite
Employment Type: Full time
Job Function: Product Management
Seniority: Mid level

Key Responsibilities

  • •Provide chip packaging design solutions, including packaging selection, design, implementation, PinMap definition, and board-level interconnection.
  • •Interface with chip designers and board-level designers to resolve interface-related issues.
  • •Perform signal integrity (SI) and power integrity (PI) analysis and optimization.

Key Requirements

  • •Master’s degree or above in Microelectronics, Electronics, Communications, Computer Science, or a related field, with at least 2 years of relevant work experience.
  • •Proficiency in EDA tools for packaging and PISI (Power Integrity & Signal Integrity) work.
  • •Experience performing PISI work for complex SoC chips, including high-speed interfaces such as DDR, PCIe, and Serdes.
  • •Familiarity with packaging structures, reliability, thermal performance, and high-speed/high-frequency interface protocols.
Experience:2+ years
Education:Master's
Skills:TeamworkResponsible work attitudeCommunicationEnglish proficiency
Languages:English
Tech Stack:EDA toolsPISIPower IntegritySignal IntegrityDDRPCIeSerdesPinMapTape-outIR dropElectromagnetic CompatibilityStatic Timing AnalysisLogic SynthesisDesign for TestabilityPhysical signoff

Company Brief

ByteDance
Develops consumer internet and content platforms, including TikTok and other apps for short-form video, news, and entertainment. It also builds advertising, commerce, and creator tools that connect audiences, brands, and publishers across global markets.
Industry: Digital Media
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Established Company
Headquarters: Beijing, China
Founded: 2012
WebsiteLinkedIn