Digital Design Verification Engineer

Join the PCIe Subsystem team to develop and enhance SystemVerilog/UVM-based testbenches for verifying new and existing PCIe features. Collaborate with architects, RTL designers, performance engineers, and post-silicon validation engineers to build deep expertise in the memory sub-system. Create staging and test plans, understand functional and performance goals to validate designs, take ownership of verification tasks, and improve productivity through automation using AI tools.