ASIC Design Engineer - New College Grad 2026

NVIDIA
Santa Clara
Workplace: OnsiteFull timeUSD 100,000 - 189,750 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Interpersonal skills","Teamwork","Debugging","Analytical thinking"]

Implement and deliver high-performance, area- and power-efficient RTL as a key member of the GPU Design team. Analyze architectural trade-offs, craft micro-architecture, and produce fully verified, synthesis/timing-clean designs. Collaborate with architects, RTL designers, and pre-/post-silicon verification, synthesis, timing, and back-end teams. Work on GPU IPs such as work schedulers, time distribution, interrupt controllers, and DMA engines, including features that support post-silicon debug and validation.

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FursaFursa
NVIDIA
NVIDIA
1 month ago

ASIC Design Engineer - New College Grad 2026

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Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live
Reposted: similar role first listed 7 months ago

Job Summary

Implement and deliver high-performance, area- and power-efficient RTL as a key member of the GPU Design team. Analyze architectural trade-offs, craft micro-architecture, and produce fully verified, synthesis/timing-clean designs. Collaborate with architects, RTL designers, and pre-/post-silicon verification, synthesis, timing, and back-end teams. Work on GPU IPs such as work schedulers, time distribution, interrupt controllers, and DMA engines, including features that support post-silicon debug and validation.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Graduate level

Key Responsibilities

  • •Implement, document, and deliver high-performance, area- and power-efficient RTL to meet design targets and specifications.
  • •Analyze architectural trade-offs across features, performance requirements, and system limitations.
  • •Craft micro-architecture, implement in RTL, and deliver fully verified, synthesis/timing-clean designs.
  • •Coordinate with architects, designers, verification teams, synthesis, timing, and back-end teams to complete tasks.
  • •Develop and support GPU IPs (e.g., work scheduler, time distribution, interrupt controllers, DMA engines) and features for silicon debug and post-silicon validation.

Pay and Benefits

Salary: USD 100,000 - 189,750 annually
Equity and Bonus:Equity

Key Requirements

  • •Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
  • •Experience with micro-architecture and RTL development (Verilog).
  • •Good understanding of the ASIC design flow, including RTL design, verification, logic synthesis, and timing analysis.
  • •Exposure to digital systems and VLSI design, including Computer Architecture and Computer Arithmetic.
  • •Strong interpersonal skills and an excellent team mindset.
Education:Bachelor's
Skills:Interpersonal skillsTeamworkDebuggingAnalytical thinking
Tech Stack:ASIC designRTLVerilogMicro-architectureLogic synthesisTiming analysisVLSIDigital systemsComputer ArchitectureComputer ArithmeticCC++PythonPerlArbitersSchedulingSynchronizationBus protocolsInterconnect networksCaches

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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