FPGA Power Management Engineer
AMD
San Jose
Workplace: HybridFull timeFunction: Energy & Utilities OperationsExperience: 5+ yearsSkills: ["Verilog","SystemVerilog","AXI4-Lite","FPGA","DVFS","AVS","Power Modeling","EDP","PPW","MIPS/W","PMBus","SVI3","Lab bring-up"]Architect and implement closed-loop DVFS and adaptive voltage scaling for next-generation FPGA platforms, bridging architecture, RTL, firmware, and lab validation to improve performance-per-watt for data center and defense workloads. As an early hire, shape power intelligence across FPGA platforms, perform silicon bring-up, develop power-performance models, and collaborate with silicon, firmware, and validation teams to deliver scalable, production-ready solutions.

