Senior/Staff Analog Design Engineer - SerDes

Olix
Austin, Bristol
Workplace: OnsiteFull timeUSD 317,000+ annuallyFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: phdSkills: ["Analog design","Mixed-signal","SerDes","Verilog-A","Cadence Virtuoso","Spectre","EM-IR","Layout","PVT","Monte Carlo"]

Senior/Staff analog design engineer focused on high-speed SerDes and mixed-signal subsystems for a next-generation SoC. Responsible for end-to-end design from circuit implementation through post-silicon validation, collaborating across analog, digital, optical, and system teams in Austin, with global coordination.

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Olix
Olix
3 months ago

Senior/Staff Analog Design Engineer - SerDes

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Last checked: 2 hours agoStatus: Live

Job Summary

Senior/Staff analog design engineer focused on high-speed SerDes and mixed-signal subsystems for a next-generation SoC. Responsible for end-to-end design from circuit implementation through post-silicon validation, collaborating across analog, digital, optical, and system teams in Austin, with global coordination.
Location: Austin, Bristol
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Architect and design high-speed SerDes blocks (serializers, TX drivers, TIAs, CTLEs, CDRs, deserializers, and clock generation) from specification through silicon in advanced FinFET nodes
  • •Perform schematic and post-layout simulations (including EM-IR and reliability simulations) to ensure robust silicon margins, and own design reviews and documentation
  • •Run EM simulations for passives, package interconnects, and on-die routing
  • •Develop behavioral and Verilog-A models to enable system-level and mixed-signal verification
  • •Supervise mask designers closely and provide floorplan and layout guidelines
  • •Collaborate with optical, digital, and system teams on interfaces and link-level performance
  • •Support post-silicon bring-up, lab validation, and debug

Pay and Benefits

Salary: USD 317,000 annually
Equity and Bonus:Equity
Perks:Health Insurance401kEquityRetirementAnnual Bonus

Key Requirements

  • •MS or PhD in Electrical Engineering with 10+ years of analog/mixed-signal IC design experience
  • •Hands-on SerDes experience at data rates of 25 Gbps or higher
  • •Strong grasp of high-speed signaling concepts: jitter, noise, equalization, signal integrity, and link budgeting
  • •Proficiency with Cadence Virtuoso, Spectre, and simulations including PVT, Monte Carlo, EM-IR, and reliability analysis
  • •Experience developing behavioral and Verilog-A models for mixed-signal verification
Experience:10+ yearsSemiconductorElectronicsSoC
Education:PhD / Doctorate in Electrical Engineering
Skills:Analog designMixed-signalSerDesVerilog-ACadence VirtuosoSpectreEM-IRLayoutPVTMonte Carlo
Tech Stack:Cadence VirtuosoSpectreVerilog-AEM-IRFinFETPVTMonte Carlo

Company Brief

Olix
Olix designs and manufactures optical processors (Optical Tensor Processing Units) for training and running inference on large AI models, aiming to deliver higher performance and lower energy consumption than conventional silicon-based accelerators.
Industry: Deep Tech
Company Size: Medium (51 to 250 employees)
Growth: Early Stage Startup
Headquarters: London, United Kingdom
Founded: 2024
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