Subsystem/SoC Level Verification Engineer
Broadcom
Bengaluru
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 12-15 yearsEducation: bachelorsSkills: ["SystemVerilog","UVM","Verilog","SV","BFMs","Scoreboards","Monitors","PerL","Tcl","Cadence","Synopsys","SDF"]Seeking an experienced verification engineer with 12-15 years in Ethernet Subsystem/SoC level functional verification to lead and develop verification environments using SystemVerilog and UVM. You will build BFMs, checkers, monitors, and scoreboards; create and execute verification plans; debug root causes; and ensure coverage across Ethernet MAC/PCS/SerDes within complex IP/Subsystem projects using Cadence/Synopsys tools.
