DDR PHY Firmware Engineer

Design, develop, and validate DDR/LPDDR memory subsystem firmware for next-generation platforms. Build foundational initialization and training algorithms that maximize bandwidth, power efficiency, and signal integrity, and implement/debug low-level reference code in C/C++. Execute validation across architectural models, simulation (including FPGA/emulation) and RTL, support post-silicon bring-up, and collaborate with SoC architecture, PHY IP, analog, and validation teams. Provide documentation, training, and technical support to OEMs and internal teams.