Senior Verification Engineer - HSIO Cluster and SOC

Develop verification components and APIs for cluster and system-level test benches for automotive HSIO IPs and SOCV-level verification. Architect testbenches, define test plans and verification infrastructure, and build reusable bus functional models, monitors, checkers, and scoreboards. Implement functional coverage to drive SOC-level verification closure while partnering with architects, designers, FPGA, and post-silicon teams to ensure robust units.