Senior Verification Engineer - HSIO Cluster and SOC

NVIDIA
India
Workplace: HybridFull timeFunction: Solutions Engineering & Sales EngineeringExperience: 4+ yearsSkills: ["Debugging","Analytical skills","Interpersonal skills","Communication","Teamwork"]

Develop verification components and APIs for cluster and system-level test benches for automotive HSIO IPs and SOCV-level verification. Architect testbenches, define test plans and verification infrastructure, and build reusable bus functional models, monitors, checkers, and scoreboards. Implement functional coverage to drive SOC-level verification closure while partnering with architects, designers, FPGA, and post-silicon teams to ensure robust units.

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FursaFursa
NVIDIA
NVIDIA
2 months ago

Senior Verification Engineer - HSIO Cluster and SOC

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Develop verification components and APIs for cluster and system-level test benches for automotive HSIO IPs and SOCV-level verification. Architect testbenches, define test plans and verification infrastructure, and build reusable bus functional models, monitors, checkers, and scoreboards. Implement functional coverage to drive SOC-level verification closure while partnering with architects, designers, FPGA, and post-silicon teams to ensure robust units.
Location: India
Workplace: Hybrid
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop verification components and APIs for cluster and system-level test benches.
  • •Architect testbenches and craft the verification environment using SV and C/C++ methodologies.
  • •Define test plans, tests, and verification infrastructure for clusters and systems.
  • •Build reusable bus functional models, monitors, checkers, and scoreboards.
  • •Implement functional coverage and drive SOC-level verification closure; collaborate with architects, designers, FPGA, and post-silicon teams to ensure unit robustness.

Key Requirements

  • •BTech or MTech in ECE, EE, CSE, or equivalent; over 4 years of experience in verification closure for complex units, sub-systems, or SOC-level verification.
  • •Proven High Speed IO verification experience (UFS/PCIE/XUSB) and knowledge of 10G/1G Ethernet MAC and Switch.
  • •Experience with latest verification methodologies such as SV and UVM.
  • •Good debugging and analytical skills with exposure to industry-standard verification tools for simulation and debug.
  • •Strong interpersonal skills, communication, and ability to work with cross-cultural global teams in a matrix organization.
Experience:4+ years
Education:
Skills:DebuggingAnalytical skillsInterpersonal skillsCommunicationTeamwork
Tech Stack:SVSystemVerilogC/C++C++UVMUFSPCIEXUSBEthernet10G1GEthernet MACMACSECUSBMPHYFPGASimulationDebugClaudeCursor

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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