1 day ago

IC Layout Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Design and implement IC layouts for memory, I/O, and standard cells within the Library Group. You’ll apply layout guidelines and new process rules, plan schedules and floor-planning, and deliver quality layout plus verification (e.g., LVS/DRC/ERC) within timeline expectations. Work with Cadence tools (Virtuoso), CALIBRE/Hercules verification, and support methodology improvements through documentation, communication, and collaboration with the library team.

Location: Singapore

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Understand and apply layout guidelines (standard cells, I/O memories) and new process rules to ensure quality layout.
•Create schedule timelines and perform layout floor-planning.
•Complete quality layout and verification within planned schedules, including without supervision for experienced engineers.
•Get up to speed quickly on new methodologies, contribute ideas, and communicate effectively with the library team.
•Lead or train junior engineers and support technology reviews to compile documentation of layout methodology, flow, and guidelines.

Key Requirements

•Strong layout knowledge with a minimum of 3 to 4 years of experience.
•Proficiency with Cadence layout and Cadence schematic capture, plus CALIBRE and Hercules verification tools.
•Experience in submicron processes (e.g., 16nm, 7nm, 5nm, 3nm, 2nm, 1.4nm) and digital layout for standard cells, memory, and I/O.
•Strong memory layout design experience and physical verification, including LVS, DRC, ERC, Antenna, and Electro Migration in CMOS.
•Analog layout experience is a plus.

Experience:3-4 yearsCircuit designSemiconductorsCMOS

Skills:CommunicationLeadershipTeam collaborationProject managementSelf-reliant

Tech Stack:Cadence layoutCadence schematic captureCALIBREHerculesCadence Virtuoso (VIRTUOSO)VIRTUOSO XLVIRTUOSO VXLVIRTUOSO EXLLVSDRCERCAntennaElectro MigrationCMOSFloor-planningHierarchy layoutChip integrationScript ProgrammingSKILL ProgrammingMemory compiler

Company Brief

Broadcom

Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Irvine, United States

Founded: 1991

Website LinkedIn

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Broadcom

1 day ago

IC Layout Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Location: Singapore

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Understand and apply layout guidelines (standard cells, I/O memories) and new process rules to ensure quality layout.
•Create schedule timelines and perform layout floor-planning.
•Complete quality layout and verification within planned schedules, including without supervision for experienced engineers.
•Get up to speed quickly on new methodologies, contribute ideas, and communicate effectively with the library team.
•Lead or train junior engineers and support technology reviews to compile documentation of layout methodology, flow, and guidelines.

Key Requirements

•Strong layout knowledge with a minimum of 3 to 4 years of experience.
•Proficiency with Cadence layout and Cadence schematic capture, plus CALIBRE and Hercules verification tools.
•Experience in submicron processes (e.g., 16nm, 7nm, 5nm, 3nm, 2nm, 1.4nm) and digital layout for standard cells, memory, and I/O.
•Strong memory layout design experience and physical verification, including LVS, DRC, ERC, Antenna, and Electro Migration in CMOS.
•Analog layout experience is a plus.

Experience:3-4 yearsCircuit designSemiconductorsCMOS

Skills:CommunicationLeadershipTeam collaborationProject managementSelf-reliant

Company Brief

Broadcom

Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Irvine, United States

Founded: 1991

Website LinkedIn