Senior Design Verification Engineer

Intel
United States
Workplace: HybridFull timeUSD 164,470 - 311,890 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: bachelorsSkills: ["Communication","Organizational skills","Mentoring"]

Own end-to-end design verification for critical chassis and interconnect IP blocks, from planning through signoff. Build scalable verification environments and reusable test plans using testbenches, checkers, VIPs, and behavioral models. Collaborate with architecture, design, and software teams to drive coverage closure and performance/power signoffs. Converge simulation and formal verification to improve bug hunting, adopt ML-driven verification flows, and mentor verification engineers.

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Intel
Intel
3 months ago

Senior Design Verification Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 17 hours agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Own end-to-end design verification for critical chassis and interconnect IP blocks, from planning through signoff. Build scalable verification environments and reusable test plans using testbenches, checkers, VIPs, and behavioral models. Collaborate with architecture, design, and software teams to drive coverage closure and performance/power signoffs. Converge simulation and formal verification to improve bug hunting, adopt ML-driven verification flows, and mentor verification engineers.
Location: United States
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Own verification planning and execution for key IP features across IP and subsystem integration points.
  • •Build scalable verification environments and targeted test plans using reusable test benches, checkers, VIPs, and behavioral models.
  • •Collaborate with architecture, design, and software teams from specification through bringup to unblock progress and maintain execution quality.
  • •Drive ownership of critical verification components through functional signoffs and achievement of performance and power metrics.
  • •Converge simulation and formal verification for unified bug hunting and coverage closure strategies; evaluate and adopt emerging methodologies including ML-driven verification flows.

Pay and Benefits

Salary: USD 164,470 - 311,890 annually
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •Bachelor of Science degree in Electrical/Computer Engineering, Computer Science, or a STEM field.
  • •10+ years of experience in design verification (DV), including IP DV and subsystem/SoC-level verification.
  • •Experience verifying interconnects, caches, and memory subsystems with protocols such as AMBA (CHI, ACE, AXI), PCIe, UCIe, and CXL, including cache coherency and memory consistency models.
  • •Experience with simulation and formal verification methodologies including UVM, SVA, ABV, and co-simulation, plus low-power verification techniques and industry-standard EDA tools.
  • •Hands-on coding across SystemVerilog/UVM, C/C++, Python, and build systems; experience working with RTL, physical design, and CAD tool flows.
Experience:10+ years
Education:Bachelor's in Electrical or Computer Engineering, Computer Science, or STEM related field
Skills:CommunicationOrganizational skillsMentoring
Tech Stack:SystemVerilogUVMSVAABVCo-simulationCC++PythonAMBACHIACEAXIPCIeUCIeCXLRTLCADEDA toolsJasperGoldVC Formal

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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