Pathfinding Senior Design Layout Engineer

Micron Technology
Mexico
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Planning","Mentoring","Communication","Problem-solving"]

Own analog, mixed-signal, and custom digital layout development for DDR blocks, partnering with global teams across multiple concurrent projects. Perform physical verification (LVS, DRC, antenna checks), quality reviews, and documentation to ensure blocks are delivered on time and meet quality gates. Lead planning, area/time estimation, scheduling, delegation, and execution, and mentor engineers during sub-block layout work and reviews.

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FursaFursa
Micron Technology
Micron Technology
2 months ago

Pathfinding Senior Design Layout Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live
Reposted: first listed 5 hours ago

Job Summary

Own analog, mixed-signal, and custom digital layout development for DDR blocks, partnering with global teams across multiple concurrent projects. Perform physical verification (LVS, DRC, antenna checks), quality reviews, and documentation to ensure blocks are delivered on time and meet quality gates. Lead planning, area/time estimation, scheduling, delegation, and execution, and mentor engineers during sub-block layout work and reviews.
Location: Mexico
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Design and develop critical analog, mixed-signal, and custom digital blocks and support full-chip level integration.
  • •Perform layout verification including LVS, DRC, antenna checks, quality reviews, and documentation.
  • •Ensure on-time delivery of block-level layouts that meet quality expectations.
  • •Lead planning, area/time estimation, scheduling, delegation, and execution across multiple concurrent projects.
  • •Mentor and guide developing team members during sub-block layout execution and review their work.

Key Requirements

  • •Demonstrated analog/custom layout design ability in advanced CMOS processes across technology nodes (Planar, FinFET).
  • •Bachelor’s, Master’s, or equivalent experience in Electronics, VLSI Engineering, or a related field.
  • •Expertise with Cadence VLE/VXL and Mentor Graphics Calibre for DRC/LVS.
  • •Hands-on experience laying out critical blocks such as temperature sensors, PLL, ADC, DAC, LDO, bandgap/reference generators, and comparators.
  • •Strong analog layout fundamentals (matching, electromigration, latch-up, coupling/crosstalk, IR-drop, parasitic effects) and ability to interpret design constraints.
Education:Bachelor's in Electronics, VLSI Engineering, or related field
Skills:PlanningMentoringCommunicationProblem-solving
Tech Stack:Cadence VLECadence VXLMentor Graphics CalibreDRCLVSCMOSFinFETPlanarAssembly Language

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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