ASIC/FPGA Design Engineer

Intel
Malaysia
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Skills: ["Strong analytical ability","Problem solving","Communication skills","Teamwork","Ability to work independently"]

Develop and maintain RTL designs in Verilog/SystemVerilog for FPGA and ASIC solutions, including functional simulation and verification to meet functional and performance specifications. Debug design and simulation issues and collaborate with architects, verification engineers, and system teams to clarify requirements and support design integration, bring-up, and issue resolution. Maintain high design quality through coding standards and technical documentation, using appropriate lab equipment for debugging.

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FursaFursa
Intel
Intel
6 months ago

ASIC/FPGA Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Develop and maintain RTL designs in Verilog/SystemVerilog for FPGA and ASIC solutions, including functional simulation and verification to meet functional and performance specifications. Debug design and simulation issues and collaborate with architects, verification engineers, and system teams to clarify requirements and support design integration, bring-up, and issue resolution. Maintain high design quality through coding standards and technical documentation, using appropriate lab equipment for debugging.
Location: Malaysia
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop and maintain RTL designs for FPGA and ASIC solutions using Verilog/SystemVerilog.
  • •Perform functional simulation and verification to ensure designs meet functional and performance specifications.
  • •Debug and resolve design and simulation issues and clarify requirements with architects, verification engineers, and system teams.
  • •Support design integration, bring-up, and issue resolution.
  • •Maintain design quality by following coding standards and keeping proper technical documentation.

Key Requirements

  • •5+ years of experience in RTL/Logic design on FPGA IP blocks using Verilog or SystemVerilog RTL coding.
  • •Experience writing and demonstrating logic design in Verilog or SystemVerilog.
  • •Gate-level understanding of RTL and synthesis (how RTL behaves after synthesis).
  • •Experience with packet-based protocols such as PCIe, USB, SPI, or I2C.
  • •Experience using lab equipment (logic analyzers, scopes, protocol analyzers) to debug issues.
Skills:Strong analytical abilityProblem solvingCommunication skillsTeamworkAbility to work independently
Tech Stack:VerilogSystemVerilogRTLFPGAASICPCIeUSBSPII2CQuartusVivadoLogic analyzersScopesProtocol analyzersAgentic AINIOSARMSynthesisGate-level design

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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