IC Design Engineer

Apply and lead Broadcom’s SoC physical design methodology to achieve right-first-time silicon. Drive floorplanning, partitioning, placement, clock tree synthesis, routing, extraction, and physical verification, working toward STA closure. Implement timing and functional ECOs, adapt and build automation flows for reuse, and support top-down/bottom-up physical design integration for 5nm and lower technologies using leading P&R, PV, STA, and ECO EDA tools.