Design Verification Engineer for DFT

Cisco
Israel
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Communication","Cross-functional collaboration","Debugging","Attention to detail","Ownership mindset"]

Join Cisco’s Design for Test (DFT) team delivering end-to-end test solutions for Cisco SiliconOne, including chips powering next-generation networking and AI workloads. Drive DFT verification by building verification plans, environments, checkers, assertions, and coverage models. Verify scan, MBIST, IJTAG/JTAG, test access mechanisms, and DFT controllers, debug complex pre-silicon issues, and help develop reusable methodologies and best practices across DFT and system-level verification.

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FursaFursa
Cisco
Cisco
2 months ago

Design Verification Engineer for DFT

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Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live
Reposted: similar role first listed 1 week ago

Job Summary

Join Cisco’s Design for Test (DFT) team delivering end-to-end test solutions for Cisco SiliconOne, including chips powering next-generation networking and AI workloads. Drive DFT verification by building verification plans, environments, checkers, assertions, and coverage models. Verify scan, MBIST, IJTAG/JTAG, test access mechanisms, and DFT controllers, debug complex pre-silicon issues, and help develop reusable methodologies and best practices across DFT and system-level verification.
Location: Israel
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead and drive DFT verification activities within the Cisco SiliconOne DFT team.
  • •Develop verification plans, environments, checkers, assertions, and coverage models for DFT features.
  • •Verify DFT architecture and implementation in collaboration with DFT, design, architecture, and verification teams.
  • •Verify scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features.
  • •Debug complex pre-silicon issues across RTL, verification environments, and DFT logic while contributing to reusable methodologies and best practices.

Key Requirements

  • •5+ years of experience in design verification roles.
  • •B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field.
  • •Strong experience with SystemVerilog and UVM-based verification environments.
  • •Experience developing verification plans, coverage models, assertions, and debug flows.
  • •Ability to work closely with cross-functional teams and communicate effectively.
Experience:5+ years
Education:Bachelor's in Electrical Engineering, Computer Engineering
Skills:CommunicationCross-functional collaborationDebuggingAttention to detailOwnership mindset
Tech Stack:Design for Test (DFT)Cisco SiliconOneSystemVerilogUVMRTLRTL debuggingScan insertionMBISTIJTAGJTAGATPGBoundary scanSoC-level testTest access mechanismsDFT controllers

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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