Senior ASIC Power Management Micro Architect, Chip Design

NVIDIA
Tel Aviv
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 12+ yearsEducation: bachelorsSkills: ["Collaboration","Autonomy","Drive to contribute"]

Own the front-end micro-architecture and design of Power Management IP ASIC blocks—from IP definition through the full design cycle into post-silicon bring-up and enablement. Partner with architecture, verification, physical design, and validation teams to drive tape-out and successful silicon bring-up. Lead post-silicon debug, characterization, and enablement to bring designs from concept to working silicon.

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FursaFursa
NVIDIA
NVIDIA
1 day ago

Senior ASIC Power Management Micro Architect, Chip Design

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Last checked: 6 hours agoStatus: Live

Job Summary

Own the front-end micro-architecture and design of Power Management IP ASIC blocks—from IP definition through the full design cycle into post-silicon bring-up and enablement. Partner with architecture, verification, physical design, and validation teams to drive tape-out and successful silicon bring-up. Lead post-silicon debug, characterization, and enablement to bring designs from concept to working silicon.
Location: Tel Aviv
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Own the front-end micro-architecture and design of Power Management IP ASIC blocks across the full design cycle into post-silicon enablement.
  • •Develop and enable new power management technologies across NVIDIA product lines.
  • •Deliver high-quality, synthesizable RTL as part of the IP Chip Design team.
  • •Partner with architecture, verification, physical design, and validation teams to drive successful tape-out and silicon bring-up.
  • •Lead post-silicon debug, characterization, and enablement to bring blocks from concept to working silicon.

Key Requirements

  • •BSc or MSc in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience).
  • •12+ years of hands-on RTL design experience.
  • •Proven ability to take a block from development through post-silicon bring-up and enablement.
  • •Strong background in front-end ASIC micro-architecture and design.
  • •Solid command of the full IP/ASIC design flow, from definition through post-silicon.
Experience:12+ years
Education:Bachelor's in Electrical Engineering, Computer Engineering
Skills:CollaborationAutonomyDrive to contribute
Tech Stack:ASICPower Management IPMicro-architectureRTLSynthesizable RTLIP/ASIC design flowPost-silicon bring-upTape-outPost-silicon debugCharacterizationLow-power design techniques

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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