Senior Full Chip Layout Engineer

NVIDIA
Tel Aviv
Workplace: OnsiteFull timeFunction: Solutions Engineering & Sales EngineeringEducation: bachelorsSkills: ["Attention to detail","Interpersonal skills","Self-motivation","Ownership","Autonomous work"]

Own full-chip physical design from floorplanning through tape-out for NVIDIA’s Networking Silicon. Perform physical layout including integration, pinning, and bump routing, and collaborate with block owners and project managers to ensure layout convergence and quality. Apply physical verification methodologies (DRC, LVS, ANT, ERC, DFM) for advanced process nodes, using scripting (TCL) and Linux-based workflows with tools such as Synopsys ICC2/FC, Innovus, ICV, and Siemens Calibre.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
NVIDIA
NVIDIA
4 days ago

Senior Full Chip Layout Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Own full-chip physical design from floorplanning through tape-out for NVIDIA’s Networking Silicon. Perform physical layout including integration, pinning, and bump routing, and collaborate with block owners and project managers to ensure layout convergence and quality. Apply physical verification methodologies (DRC, LVS, ANT, ERC, DFM) for advanced process nodes, using scripting (TCL) and Linux-based workflows with tools such as Synopsys ICC2/FC, Innovus, ICV, and Siemens Calibre.
Location: Tel Aviv
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Perform full-chip physical layout including integration, pinning, and bump routing.
  • •Work with block owners and project managers to ensure layout convergence and quality across all layout aspects.
  • •Drive chip layout end-to-end from floorplanning through tape-out.
  • •Apply physical verification methodologies for advanced process nodes.
  • •Support design execution using physical design and physical verification EDA tools.

Key Requirements

  • •Electronics Engineer certificate or a B.Sc. in Electrical Engineering.
  • •5 years of hands-on full-chip layout and physical verification experience.
  • •Strong knowledge of physical verification methodologies including DRC, LVS, ANT, ERC, and DFM for advanced process nodes.
  • •Experience with scripting languages such as TCL, and working in Unix/Shell environments with Linux.
  • •Familiarity with physical design EDA tools such as Synopsys (ICC2/FC) and Cadence (Innovus), plus physical verification tools like Synopsys (ICV) and Siemens (Calibre).
Experience:Physical designPhysical verification
Education:Bachelor's in Electrical Engineering
Skills:Attention to detailInterpersonal skillsSelf-motivationOwnershipAutonomous work
Tech Stack:TCLUnixShellLinuxSynopsys ICC2Synopsys FCCadence InnovusSynopsys ICVSiemens Calibre

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
WebsiteLinkedInGlassdoor