Senior IP Design Verification Engineer - XBAR IP

Seek an experienced verification engineer to validate ASIC memory subsystem designs for NVIDIA GPUs/SOCs. You will define verification scope, build infrastructure, create test plans, and drive functional coverage using SV/UVM and Verilog-based verification. Collaborate with architects, designers, and pre/post-silicon teams to verify complex IPs/sub-systems and deliver reusable verification components in a hybrid work environment.