Senior Physical Design Engineer

NVIDIA
United States
Workplace: OnsiteFull time136,000 - 264,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Analytical","Debugging","Team collaboration","Scripting"]

Lead all aspects of physical design and implementation of SOC devices targeted at networking markets, at partition and chiplet levels. Establish physical design methodologies, flow automation, floorplanning, power/clock distribution, chip assembly and P&R, and timing closure. Manage RTL2GDS work including synthesis, power/clock distribution, place-and-route, timing closure, and physical verification; leverage ML/AI for design flow optimization. Proficient in industry EDA tools and scripting.

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FursaFursa
NVIDIA
NVIDIA
5 months ago

Senior Physical Design Engineer

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Last checked: 5 hours agoStatus: Live

Job Summary

Lead all aspects of physical design and implementation of SOC devices targeted at networking markets, at partition and chiplet levels. Establish physical design methodologies, flow automation, floorplanning, power/clock distribution, chip assembly and P&R, and timing closure. Manage RTL2GDS work including synthesis, power/clock distribution, place-and-route, timing closure, and physical verification; leverage ML/AI for design flow optimization. Proficient in industry EDA tools and scripting.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Sr. Manager level

Key Responsibilities

  • •Lead all aspects of physical design and implementation of SOC devices targeted at the networking markets.
  • •Work will be at the partition and chiplet level.
  • •Participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
  • •Daily work involves all aspects of physical chip development (RTL2GDS) – trial synthesis, power and clock distribution, place and route, timing closure, power and noise analysis and physical verification.
  • •Collaborate with cross-functional teams to ensure designs deliver production-ready results.

Pay and Benefits

Salary: 136,000 - 264,500 annually
Equity and Bonus:Equity
Perks:EquityBenefits

Key Requirements

  • •BSEE / MSEE or equivalent experience.
  • •5 years of experience in VLSI physical design implementation on 5nm, 4nm and 3nm technology.
  • •A successful track record of delivering designs to production is a requirement.
  • •Able to assist in design flow development and debugging, including application of ML/AI solutions.
  • •Proficiency with P&R, Timing Analysis, Physical Verification, IR Drop Analysis, CAD tools from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence (Genus/Innovus/Tempus) and other major EDA companies.
Experience:5+ yearsSemiconductorsVLSINetworking silicon
Education:Bachelor's
Skills:AnalyticalDebuggingTeam collaborationScripting
Tech Stack:PythonPerlTclMakeICC2DCPTSTARICVGenusInnovusTempusSynthesisPlace and RouteRC extraction

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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Glassdoor: 4.3
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