Sr. Manager Silicon Design Engineering

AMD
Austin
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Education: high_schoolSkills: ["Leadership","Communication","Writing","Presentation","Mentoring","Coaching","Problem-solving","Analytic thinking","Self-motivation"]

Lead and manage the Security IP (SECIP) team responsible for hardware/firmware co-verification of embedded micro-processor subsystems and hardware accelerators in leading-edge SoCs. Own verification architecture, testbenches, and methodologies using UVM SystemVerilog and C-DPI, including FPGA prototype co-verification and performance modeling. Drive verification execution, metrics closure, and cross-team interfaces across SoC integration and SoC DV efforts.

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FursaFursa
AMD
AMD
1 day ago

Sr. Manager Silicon Design Engineering

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Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Lead and manage the Security IP (SECIP) team responsible for hardware/firmware co-verification of embedded micro-processor subsystems and hardware accelerators in leading-edge SoCs. Own verification architecture, testbenches, and methodologies using UVM SystemVerilog and C-DPI, including FPGA prototype co-verification and performance modeling. Drive verification execution, metrics closure, and cross-team interfaces across SoC integration and SoC DV efforts.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Sr. Manager level

Key Responsibilities

  • •Lead a high-performance engineering team and manage schedule commitments, performance reviews, and career development.
  • •Form, nurture, and support the team executing hardware/firmware co-verification and verification infrastructure work.
  • •Develop and maintain subsystem verification architecture, testbench methodology, and verification metrics closure.
  • •Drive subsystem and block-level test plans, build/debug UVM and C-DPI test cases, and improve verification metrics.
  • •Collaborate with SoC integration and SoC DV teams, define IP-level DV APIs, and support IP build/delivery, emulation, and silicon bring-up/debugging.

Key Requirements

  • •Experience leading and managing engineering teams in technical and managerial settings.
  • •Proven experience with firmware-based hardware verification and contributions to firmware development initiatives.
  • •Hands-on expertise with hardware/firmware co-verification using UVM SystemVerilog and C-DPI structured testbenches.
  • •Experience developing subsystem verification architecture, testbench/test methodology, and integrating performance models for embedded CPU and subcomponent IPs.
  • •Bachelors or Masters degree in computer engineering or electrical engineering.
Education:High School in computer engineering/Electrical Engineering
Skills:LeadershipCommunicationWritingPresentationMentoringCoachingProblem-solvingAnalytic thinkingSelf-motivation
Tech Stack:UVMSystemVerilogC-DPIFPGAUVCSystem Response modelsUVM randomized testingUVM test methodologyC-DPI directed testingAXIAHBCryptographyData compressionDMAPerformance modelsDV APIEmulationSilicon bring-upHardware accelerators

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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