Senior IP Verification Engineer with high-speed interface protocols

AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Solutions Engineering & Sales EngineeringSkills: ["Communication skills","Teamwork","Analytical thinking","Problem-solving","Willingness to learn"]

Plan, build, and execute verification for new and existing features of Soft IP cores, ensuring silicon-proven quality across supported platforms with zero escapes to production. Collaborate with IP designers, architects, and application engineers to define verification parameterization and comprehensive strategies (test plans, coverage models, ABV, constrained-random, and formal where applicable). Drive verification closure using metrics and quality sign-off, debug complex digital/firmware interface issues, and improve UVM/SystemVerilog best practices and regression/CI/CD automation.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
AMD
AMD
1 day ago

Senior IP Verification Engineer with high-speed interface protocols

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live

Job Summary

Plan, build, and execute verification for new and existing features of Soft IP cores, ensuring silicon-proven quality across supported platforms with zero escapes to production. Collaborate with IP designers, architects, and application engineers to define verification parameterization and comprehensive strategies (test plans, coverage models, ABV, constrained-random, and formal where applicable). Drive verification closure using metrics and quality sign-off, debug complex digital/firmware interface issues, and improve UVM/SystemVerilog best practices and regression/CI/CD automation.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Collaborate with IP designers, architects, and application engineers to understand features and verification parameterization requirements.
  • •Develop verification strategies and documentation, including test plans and functional coverage models.
  • •Create and run directed and constrained-random verification tests, including coverage closure strategies and parameter configuration.
  • •Drive verification closure using coverage metrics, bug convergence, and quality sign-off criteria.
  • •Debug complex design and verification issues across digital and firmware interfaces; review team verification architecture, testbench design, and coding standards; promote UVM/SystemVerilog and automation improvements.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •7+ years of industry experience in IP/SoC-level design verification.
  • •Proficiency in IP-level ASIC or FPGA functional verification and RTL debugging using simulation tools.
  • •Hands-on experience with SystemVerilog and UVM verification frameworks, including constrained-random verification.
  • •Strong knowledge of assertion-based verification (SVA/PSL), coverage closure, and formal verification tools/methodologies.
  • •Bachelors or Masters degree in computer engineering or electrical engineering.
Experience:ASICFPGASoCIP verificationDigital designUVMFormal verification
Education:
Skills:Communication skillsTeamworkAnalytical thinkingProblem-solvingWillingness to learn
Tech Stack:SystemVerilogUVMAssertion-based verificationSVAPSLConstrained-random verificationFormal verificationQuestaXceliumVCSVivado SimulatorUVM methodologyRegression infrastructureCI/CD verificationVerification automation frameworksLSFPythonPerlShellMakefile

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn