Silicon Verification Engineer
AMD
Singapore
Workplace: HybridFull timeFunction: QA, Test & Release EngineeringEducation: bachelorsSkills: ["Analytical","Debugging","Communication","Problem-solving","Collaboration"]Join the DDR PHY IP development team as an entry-level Silicon Verification Engineer. You’ll build and maintain UVM-based verification environments, write and run directed and constrained-random tests with functional coverage, and debug simulation failures with RTL designers. The role includes creating verification collateral, running regressions, tracking coverage closure, and contributing automation scripts to improve verification efficiency, supporting reliable silicon for SoCs across data center, mobile, and automotive.

