Principal Engineer - Memory Circuit Design Verification
Hyderabad
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 12+ yearsEducation: bachelorsSkills: ["Problem-solving","Debugging","Analytical skills","Cross-team communication","Ownership mindset"]Own verification architecture and methodology for next-generation DDR designs, defining verification plans, coverage strategies, and sign-off criteria. Build and extend UVM-based testbenches and reusable verification components while collaborating with build teams to ensure verification completeness and quality. Lead technical guidance for verification engineers, integrate AMS co-simulation for mixed-signal IP, and partner with EDA vendors and AI/ML tools to improve regression efficiency, failure classification, and debug turnaround time.
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