ASIC Engineering Technical Leader - Emulation
San Jose
Workplace: OnsiteFull timeUSD 186,900 - 267,700 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 10+ yearsSkills: ["Technical leadership","Mentoring","Communication","Collaboration","Root cause analysis"]Lead the planning and execution of ASIC verification for complex networking SoCs, driving verification strategy, testplan development, coverage closure, and end-to-end execution across multiple IPs and subsystems. Provide technical leadership and mentorship to verification engineers while building scalable, reusable verification environments using SystemVerilog/UVM. Partner with architecture, RTL, emulation, FPGA, and post-silicon teams to enable efficient debug, root-cause analysis, and successful silicon bring-up.
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