3 months ago

Power Validation Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Lead end-to-end electrical power characterization for an AI-focused ASIC and mezzanine platform, designing measurement methodologies, building test benches, and driving findings into silicon, package, and system design decisions to ensure robust power delivery and reliability.

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Key Responsibilities

•Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs.
•Validate power delivery network (PDN) performance — VRM load step response, PCIe power compliance, PDN impedance — and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams.
•Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes.
•Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior; instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.
•Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios; own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages.

Pay and Benefits

Perks:Health InsuranceHousing SubsidyRelocationWellness StipendMeal Allowance

Key Requirements

•Bachelor’s degree in Electrical Engineering or a related field.
•Deep understanding of ASIC and system-level power delivery — VRM topology, PDN impedance, decoupling strategy, and transient response with hands-on bench experience.
•Expertise with multi-phase solutions with high dynamic content and low tolerance.
•Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ASIC.
•Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency, and a track record of finding bugs that only surface under specific workload or environmental conditions.

Experience:SemiconductorsHardwareAI hardwareServer hardware

Education:Bachelor's

Skills:PythonPMBusBMCVNAOscilloscopePDNVRMDVFS

Tech Stack:PythonPMBusBMCVNAOscilloscopePDNVRMDVFS

Company Brief

Etched

Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.

Industry: Hardware Devices

Company Size: Medium (51 to 250 employees)

Growth: Early Stage Startup

Valuation: Unicorn (USD 1B+)

Funding: Series A

Headquarters: San Jose, United States

Founded: 2022

Website LinkedIn Glassdoor

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Etched

3 months ago

Power Validation Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Energy & Utilities Operations

Key Responsibilities

•Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs.
•Validate power delivery network (PDN) performance — VRM load step response, PCIe power compliance, PDN impedance — and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams.
•Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes.
•Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior; instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.
•Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios; own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages.

Pay and Benefits

Perks:Health InsuranceHousing SubsidyRelocationWellness StipendMeal Allowance

Key Requirements

•Bachelor’s degree in Electrical Engineering or a related field.
•Deep understanding of ASIC and system-level power delivery — VRM topology, PDN impedance, decoupling strategy, and transient response with hands-on bench experience.
•Expertise with multi-phase solutions with high dynamic content and low tolerance.
•Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ASIC.
•Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency, and a track record of finding bugs that only surface under specific workload or environmental conditions.

Experience:SemiconductorsHardwareAI hardwareServer hardware

Education:Bachelor's

Skills:PythonPMBusBMCVNAOscilloscopePDNVRMDVFS

Tech Stack:PythonPMBusBMCVNAOscilloscopePDNVRMDVFS

Company Brief

Etched

Industry: Hardware Devices

Company Size: Medium (51 to 250 employees)

Growth: Early Stage Startup

Valuation: Unicorn (USD 1B+)

Funding: Series A

Headquarters: San Jose, United States

Founded: 2022

Website LinkedIn Glassdoor