RTL Design Engineer

AMD
Markham
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Detail-oriented","Analytical thinking","Problem-solving","Communication","Ownership"]

Build and deliver robust RTL and IP logic for ASIC designs on the T&E NBIO/PCIe subsystem team. Provide technical leadership across the ASIC design lifecycle, partnering with architecture, verification, FEINT design, physical design, and post-silicon engineering teams. Develop and optimize Verilog-based RTL/IP to meet performance, power, and quality goals, troubleshoot regressions and coverage gaps, and support successful post-silicon bring-up and yield-learning.

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FursaFursa
AMD
AMD
1 day ago

RTL Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Build and deliver robust RTL and IP logic for ASIC designs on the T&E NBIO/PCIe subsystem team. Provide technical leadership across the ASIC design lifecycle, partnering with architecture, verification, FEINT design, physical design, and post-silicon engineering teams. Develop and optimize Verilog-based RTL/IP to meet performance, power, and quality goals, troubleshoot regressions and coverage gaps, and support successful post-silicon bring-up and yield-learning.
Location: Markham
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Provide technical leadership for ASIC architecture, IP development, and end-to-end design execution.
  • •Develop, review, and optimize RTL and IP logic designs to meet functional, performance, power, and quality objectives.
  • •Partner with architecture, design verification, FEINT design, physical design, and integration teams to resolve design issues.
  • •Support integration of IP and subsystem-level designs into complex silicon products.
  • •Review code coverage, debug regression failures, and provide post-silicon support for bring-up and yield-learning activities.

Key Requirements

  • •Strong experience with ASIC design flows, ASIC architecture, and IP development.
  • •Demonstrated expertise in RTL and IP logic design using Verilog.
  • •Experience with high-speed protocol and controller IP, particularly PCI Express/PCIe subsystem designs or SerDes PHY technologies.
  • •Experience with VCS or similar simulation and verification tools.
  • •Proficiency with Perl or Shell (or similar) scripting languages for design and verification workflows.
Experience:ASICSemiconductor
Education:Master's in Electrical Engineering, Computer Engineering
Skills:Detail-orientedAnalytical thinkingProblem-solvingCommunicationOwnership
Languages:English
Tech Stack:RTLVerilogPCI ExpressPCIeSerDesVCSPerlShellASIC design flowsASIC architectureCode coverageRegression debugging

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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