SRAM Physical Design Engineer

AMD
United States
Workplace: HybridFull timeUSD 126,700 - 217,200 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Analytical thinking","Problem-solving","Attention to detail","Communication","Teamwork"]

Develop and optimize high-speed SRAM and memory structures that power AMD CPU cores. You’ll collaborate with architecture, RTL, circuit design, and physical design teams to balance performance, power, area, and schedule. Responsibilities include floorplanning through timing closure, resolving implementation and signoff challenges, improving design methodology/flow, and supporting verification, reliability analysis, and documentation through reviews and technical presentations.

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FursaFursa
AMD
AMD
1 day ago

SRAM Physical Design Engineer

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Last checked: 22 minutes agoStatus: Live

Job Summary

Develop and optimize high-speed SRAM and memory structures that power AMD CPU cores. You’ll collaborate with architecture, RTL, circuit design, and physical design teams to balance performance, power, area, and schedule. Responsibilities include floorplanning through timing closure, resolving implementation and signoff challenges, improving design methodology/flow, and supporting verification, reliability analysis, and documentation through reviews and technical presentations.
Location: United States
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Contribute to physical design and implementation of high-speed SRAM and memory structures for advanced CPU products.
  • •Collaborate across architecture, RTL, circuit design, and physical design teams to optimize power, performance, area, and schedule.
  • •Perform floorplanning, placement, clock tree synthesis, routing, timing closure, and related design optimization activities.
  • •Analyze and resolve implementation, timing, power, and signoff challenges.
  • •Support physical verification, extraction, reliability analysis, and design signoff activities, including documentation and technical presentations.

Pay and Benefits

Salary: USD 126,700 - 217,200 annually

Key Requirements

  • •Experience with high-speed SRAM design, memory design, or memory-centric physical implementation.
  • •Strong understanding of CPU/cache performance-critical digital design and power/performance/area tradeoffs.
  • •Knowledge of chip-level floorplanning, bus and pin planning, clock tree synthesis, placement, optimization, routing, and timing closure.
  • •Experience with parasitic extraction, static timing analysis, physical verification, and design signoff methodologies.
  • •Familiarity with power integrity analysis (IR-drop and electromigration) and ability to modify complex Verilog RTL to meet timing/power/objectives.
Education:Bachelor's in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
Skills:Analytical thinkingProblem-solvingAttention to detailCommunicationTeamwork
Languages:En-us
Tech Stack:VerilogTclPerlCPythonFloorplanningClock tree synthesisStatic timing analysisParasitic extractionIR-dropElectromigrationTiming closureRoutingPlacementPhysical verificationDesign signoff

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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