Hardware - Silicon Validation Team Lead (NPU SoC)

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceSkills: ["Leadership","Cross-functional communication","Mentoring","Systematic validation","Debugging","Problem solving"]

Lead FuriosaAI’s Silicon Validation team to ensure NPU SoC chips function flawlessly from first-silicon bring-up through system performance optimization. Own system-level validation for compute and high-speed interfaces, develop and execute test plans across emulator/FPGA and post-silicon environments, create bare-metal test firmware, and drive HW/SW co-debugging with teams to resolve complex bring-up issues and define workarounds. Build validation automation and CI/CD-linked verification environments.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
FuriosaAI
FuriosaAI
1 week ago

Hardware - Silicon Validation Team Lead (NPU SoC)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Lead FuriosaAI’s Silicon Validation team to ensure NPU SoC chips function flawlessly from first-silicon bring-up through system performance optimization. Own system-level validation for compute and high-speed interfaces, develop and execute test plans across emulator/FPGA and post-silicon environments, create bare-metal test firmware, and drive HW/SW co-debugging with teams to resolve complex bring-up issues and define workarounds. Build validation automation and CI/CD-linked verification environments.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Manager level

Key Responsibilities

  • •Drive NPU 1st silicon bring-up and scenario-based functional verification across accelerator cores, CPU subsystem, NoC, memory subsystem (LPDDR/HBM), and high-speed interfaces (e.g., Ethernet), including board bring-up and system initialization.
  • •Create and execute validation methodology: define test plans and coverage for pre- and post-silicon environments, and develop test firmware (bare-metal) plus scenarios for each IP.
  • •Perform system-level issue debugging and derive workarounds across HW/SW boundaries, using tools like JTAG and Trace32, and report findings to relevant teams.
  • •Support performance validation and optimization by verifying NPU data-processing pipelines and memory bandwidth performance.
  • •Implement test automation by writing automation scripts and building CI/CD-integrated validation environments.

Key Requirements

  • •Lead NPU-generation bring-up and validation roadmap planning, including schedule management.
  • •Partner cross-functionally across design, DV, firmware, software, and QA to drive technical decisions and coordination.
  • •Build and mentor the team by establishing and embedding a systematic validation methodology.
  • •Strong experience with SoC/ASIC and complex silicon/system validation, with leadership-level expertise required for the lead role.
  • •Deep understanding of ARM architecture and AMBA bus (e.g., AXI/AHB), plus embedded C/C++ and Rust capabilities for bare-metal IP testing and debugging (including JTAG/Trace32).
Experience:SoCASICSilicon validationNPUHardware validation
Skills:LeadershipCross-functional communicationMentoringSystematic validationDebuggingProblem solving
Tech Stack:Embedded CC++RustARM ArchitectureAMBAAXIAHBJTAGTrace32EmulatorFPGABare-metalLinux KernelDevice DriverEthernetCXLLPDDRHBMPalladiumZebu

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
WebsiteLinkedInGlassdoor