Silicon Design Staff Engineer

AMD
Penang
Workplace: HybridFull timeMYR 185,500 - 265,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Communication","Team leading","Technical discussion"]

Develop and maintain infrastructure and environments for PCIe subsystem IP verification, partnering with Design and Architecture teams to build new verification components. Own PCIe SS IP new-feature verification plans through to verification closure. Bring ASIC design verification flow experience, multiple tape-outs, and strong testbench architecture skills, leveraging UVM with SystemVerilog and Verilog, plus PCIe and high-speed IO background where possible.

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FursaFursa
AMD
AMD
1 day ago

Silicon Design Staff Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live
Reposted: similar role first listed 3 weeks ago

Job Summary

Develop and maintain infrastructure and environments for PCIe subsystem IP verification, partnering with Design and Architecture teams to build new verification components. Own PCIe SS IP new-feature verification plans through to verification closure. Bring ASIC design verification flow experience, multiple tape-outs, and strong testbench architecture skills, leveraging UVM with SystemVerilog and Verilog, plus PCIe and high-speed IO background where possible.
Location: Penang
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop and update infrastructure and environments for IP level design verification
  • •Collaborate with Design and Architecture teams to develop new verification components
  • •Create and execute PCIe SS IP verification plans for new features
  • •Drive verification closure for PCIe SS IP new features
  • •Work with global Architects/Designers/DV teams on PCIe SS IP verification

Pay and Benefits

Salary: MYR 185,500 - 265,000 annually

Key Requirements

  • •8+ years of ASIC design verification flow experience with multiple ASIC tape-outs
  • •Team leading experience and experience with testbench architecture
  • •Solid knowledge of UVM, SystemVerilog, and Verilog
  • •Background in PCIe verification preferred, or other high-speed IO protocol/SerDes PHY experience
  • •Bachelors or Masters degree in computer engineering or electrical engineering
Experience:8+ years
Education:Bachelor's in computer engineering/Electrical Engineering
Skills:CommunicationTeam leadingTechnical discussion
Languages:English
Tech Stack:UVMSystemVerilogVerilogASICPCIe

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn