IP Verification Engineer

AMD
San Jose
Workplace: HybridFull timeUSD 175,000 - 300,000 annuallyFunction: QA, Test & Release EngineeringEducation: bachelorsSkills: ["Communication","Analytical skills","Problem-solving","Teamwork","Independent work"]

Work on the front-end design/integration verification team to drive first-pass silicon success for FPGA and ASIC IP across multiple customers. Collaborate with architects, hardware, firmware, and product engineers to understand features, create UVM-based testbenches (directed/random), and build verification components like monitors and scoreboards. Develop test plan documentation, run regressions, and debug failures to improve functional, performance, and implementation quality.

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FursaFursa
AMD
AMD
6 days ago

IP Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 53 minutes agoStatus: Live
Reposted: similar role first listed 7 months ago

Job Summary

Work on the front-end design/integration verification team to drive first-pass silicon success for FPGA and ASIC IP across multiple customers. Collaborate with architects, hardware, firmware, and product engineers to understand features, create UVM-based testbenches (directed/random), and build verification components like monitors and scoreboards. Develop test plan documentation, run regressions, and debug failures to improve functional, performance, and implementation quality.
Location: San Jose
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand features to be verified.
  • •Develop test plan documentation covering interactions across hardware, firmware, and software driver use cases.
  • •Code IP or SS-level UVM based testbenches and verification components such as monitors, scoreboard, and checkers.
  • •Build directed and random verification tests.
  • •Run regressions and debug test failures to ensure functional, performance, and implementation quality.

Pay and Benefits

Salary: USD 175,000 - 300,000 annually

Key Requirements

  • •Passion for modern, complex IP architectures and verification, with strong analytical and problem-solving skills.
  • •Experience collaborating with engineers across sites/time zones and strong communication skills.
  • •Proficiency in IP level verification and developing UVM-based verification frameworks and testbenches.
  • •Expertise in Verilog and SystemVerilog, with object-oriented programming experience.
  • •Comfortable scripting and tools experience, including Python/Perl and simulation profile/efficiency improvements; PCIe/CXL/NVMe/ethernet experience preferred.
Education:Bachelor's in Computer Engineering/Electrical Engineering
Skills:CommunicationAnalytical skillsProblem-solvingTeamworkIndependent work
Languages:En-us
Tech Stack:FPGAASICsUVMVerilogSystemVerilogPCIeCXLNVMeEthernetPythonPerlSimulationHLS

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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