Senior Package Layout Engineer - Hardware

NVIDIA
Santa Clara
Workplace: HybridFull timeUSD 136,000 - 212,750 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Cadence APD","SiP","PCB layout","HDI","Virtuoso","Calibre","Constraint Manager","Signal integrity","Segregated tool usage"]

Senior Package Layout Engineer leads high-speed, high-density IC package layout efforts, collaborating with design teams to optimize PCB/substrate layouts, routing, and tooling usage (Cadence APD, SiP, Virtuoso, Calibre) to meet size, cost, and performance goals for NVIDIA products.

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FursaFursa
NVIDIA
NVIDIA
4 months ago

Senior Package Layout Engineer - Hardware

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live
Reposted: similar role first listed 6 months ago

Job Summary

Senior Package Layout Engineer leads high-speed, high-density IC package layout efforts, collaborating with design teams to optimize PCB/substrate layouts, routing, and tooling usage (Cadence APD, SiP, Virtuoso, Calibre) to meet size, cost, and performance goals for NVIDIA products.
Location: Santa Clara
Workplace: Hybrid
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

  • •Collaborate to implement high speed/density ASIC packages
  • •Perform substrate breakout patterns for ASIC packages
  • •Optimize package pinout incorporating system level trade-offs of pins assignment
  • •Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite
  • •Develop methodologies to improve layout productivity

Pay and Benefits

Salary: USD 136,000 - 212,750 annually
Equity and Bonus:Equity
Perks:Equity

Key Requirements

  • •Hold a B.S. Electrical Engineering or equivalent experience
  • •5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus
  • •Proven experience in substrate layout of wire bond and flip chip packages, preferred
  • •Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)
  • •Solid understanding of high-speed design signal integrity practices
Experience:5+ yearsSemiconductorHardware
Education:Bachelor's in Electrical Engineering
Skills:Cadence APDSiPPCB layoutHDIVirtuosoCalibreConstraint ManagerSignal integritySegregated tool usage
Tech Stack:Cadence APDSiPCadenceVirtuosoCalibreConstraint ManagerValor

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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