Senior Package Layout Engineer - Hardware
Santa Clara
Workplace: HybridFull timeUSD 136,000 - 212,750 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Cadence APD","SiP","PCB layout","HDI","Virtuoso","Calibre","Constraint Manager","Signal integrity","Segregated tool usage"]Senior Package Layout Engineer leads high-speed, high-density IC package layout efforts, collaborating with design teams to optimize PCB/substrate layouts, routing, and tooling usage (Cadence APD, SiP, Virtuoso, Calibre) to meet size, cost, and performance goals for NVIDIA products.
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