Programmable Clock leadership role, Adaptive Computing Group

AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,531,570 - 5,045,100 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 15+ yearsEducation: bachelorsSkills: ["Verilog","SystemVerilog","STA","Primetime","Design Compiler","ICC2","AMS sim","Timing analysis","Clocking"]

Lead the Programmable Clock Design & Methodologies team for AMD’s Adaptive-Embedded Computing products in India. Drive development of clocking solutions, coordinate with global Clock team, mentor engineers, and deliver scalable clock architectures for complex SoCs, addressing timing, skew, and signal integrity across multiple product families.

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FursaFursa
AMD
AMD
3 months ago

Programmable Clock leadership role, Adaptive Computing Group

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Last checked: 9 hours agoStatus: Live

Job Summary

Lead the Programmable Clock Design & Methodologies team for AMD’s Adaptive-Embedded Computing products in India. Drive development of clocking solutions, coordinate with global Clock team, mentor engineers, and deliver scalable clock architectures for complex SoCs, addressing timing, skew, and signal integrity across multiple product families.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Sr. Manager level

Key Responsibilities

  • •Lead the Programmable Clock Design & Methodologies team in India and collaborate with the global Clock team to solve complex clocking issues in AMD’s SOCs.
  • •Develop and optimize programmable clock distribution methodologies, clock skew, signal integrity, and power integrity for next-generation products.
  • •Perform large-scale block-to-block clock timing analysis (within Die and Die-to-Die interposers) and debug timing paths.
  • •Coordinate with IP teams (RTL, circuit, physical design, full-chip timing, integration) during IP implementation and qualification.
  • •Identify required team roles (Circuit Design, STA, Physical Design, RTL, etc.) and mentor engineers to build capability and deliver high-quality clocking solutions.

Pay and Benefits

Salary: INR 3,531,570 - 5,045,100 annually

Key Requirements

  • •15+ years of experience in clocking methodologies and programmable clocking is a plus
  • •Deep understanding of system-level clocking and timing analysis, including STA
  • •Proficiency with Verilog/SystemVerilog and EDA tools (Primetime, Design Compiler, ICC2)
  • •Strong leadership and mentoring abilities with experience leading global teams (USA & India)
  • •Excellent communication skills and ability to convert high-level concepts into tangible specifications
Experience:15+ yearsSemiconductorsEmbedded systemsHardwareClockingSoC
Education:Bachelor's
Skills:VerilogSystemVerilogSTAPrimetimeDesign CompilerICC2AMS simTiming analysisClocking
Languages:English
Tech Stack:VerilogSystemVerilogPrimetimeDesign CompilerICC2AMS simVerilog-ASTATiming closure

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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