Silicon Packaging Design Engineer

Intel
Malaysia
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 4+ yearsEducation: bachelorsSkills: ["Problem-solving","Analytical skills","Collaboration","Communication"]

Drive end-to-end substrate design for innovative semiconductor package substrates, from design through tapeout. Own physical layout and routing, run substrate fit/routing tradeoff studies, and document package design requirements. Partner with silicon and hardware teams to optimize silicon-package-board interfaces and pinout, ensuring compliance with substrate design rules and resolving DRCs through internal/external design reviews. Continuously improve cost, schedule, and quality through design innovations and efficiency.

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FursaFursa
Intel
Intel
2 months ago

Silicon Packaging Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live
Reposted: similar role first listed 1 week ago

Job Summary

Drive end-to-end substrate design for innovative semiconductor package substrates, from design through tapeout. Own physical layout and routing, run substrate fit/routing tradeoff studies, and document package design requirements. Partner with silicon and hardware teams to optimize silicon-package-board interfaces and pinout, ensuring compliance with substrate design rules and resolving DRCs through internal/external design reviews. Continuously improve cost, schedule, and quality through design innovations and efficiency.
Location: Malaysia
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead the full substrate design process, from design through tapeout, optimizing performance, manufacturability, and cost.
  • •Implement physical layout and routing of package designs using design tools and methodologies, meeting design requirements.
  • •Conduct substrate fit and routing studies to evaluate design, performance, and cost tradeoffs.
  • •Document detailed design requirements in the Package Design Requirement Document and resolve design rule checks (DRCs) through internal and external reviews.
  • •Collaborate with silicon and hardware teams to optimize silicon-package-board performance and pinout, and improve cost/schedule/quality through design innovations and efficiencies.

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Electronics, or a related field.
  • •4+ years of experience in substrate/package design with a Bachelor’s degree (or 3 years with a Master’s degree; or PhD with no experience required).
  • •Proficiency with substrate layout and routing tools such as Cadence APD or Mentor Xpedition.
  • •Experience using an electrical design analysis software tool and strong understanding of substrate design rules/DRC resolution and package-board interface optimization.
  • •Familiarity with substrate manufacturing and assembly processes.
Experience:4+ years
Education:Bachelor's
Skills:Problem-solvingAnalytical skillsCollaborationCommunication
Tech Stack:Cadence APDMentor XpeditionDRCs

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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