Silicon Packaging Design Engineer

Drive end-to-end substrate/package design for innovative Intel products, from design through tapeout, optimizing performance, manufacturability, and cost. Build package physical layouts and routing using tools like Cadence APD and Mentor Xpedition, run substrate fit/routing trade studies, and document detailed requirements. Partner with silicon and hardware teams to optimize silicon-package-board interfaces and resolve design rule checks (DRCs) through internal and external design reviews. Continuously improve design efficiency and quality.