ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years

Join the Cisco Silicon One team to implement and evolve hardware Design-for-Test (DFT) features that enable ATE support, in-system testing, debug, and diagnostics. Develop innovative DFT IP, collaborate with RTL and design/verification teams to integrate testability logic across full-chip flows, and support post-silicon validation. You’ll use JTAG, scan insertion, ATPG, and EDA tools while crafting and debugging solutions with minimal mentorship.