Senior Physical Design Engineer
Intel
San Jose
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: bachelorsSkills: ["Communication","Team collaboration","Problem-solving","Cross-site collaboration","Attention to detail"]Join Intel's Central Engineering Group to perform physical design of custom IP and SoC from RTL to GDS, including synthesis, place-and-route, clock tree synthesis, floor planning, timing analysis, power and noise analysis, and sign-off verification. Optimize power, frequency and area, mentor others, and help advance physical design methodologies in a hybrid work model.

