Senior Memory Circuit Design Verification Engineer (E3)
Hyderabad, Telangana, India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: mastersSkills: ["Ownership","Technical judgment","Debugging","Analytical thinking","Communication"]Own analog/mixed-signal pre-silicon verification for DRAM/HBM timing sign-off within scope. Execute FastSpice-based verification, run full-chip and block-level SPICE simulations across PVT corners, and debug functional and timing issues to drive verification closure. Build and maintain SPICE/mixed-signal testbenches, create coverage-improving test cases, and collaborate with cross-geo teams (US, Japan, Mexico) while documenting results and improving verification methodologies.
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