Physical Design Engineer

Intel
Bengaluru
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 2+ yearsEducation: bachelorsSkills: ["Critical thinking","Problem-solving","Communication","Organizational skills","Collaboration"]

Translate RTL to GDS for custom IP and SoC designs, building manufacturing-ready physical design databases. Own key physical design flow steps including synthesis, place and route, clock tree synthesis, floorplanning, and static timing analysis, plus power/clock distribution and reliability. Verify and sign off using formal equivalence, layout verification, electrical rule checking, and structural checks, analyzing results to drive timing, power, and area optimizations. Contribute to methodology and automation improvements.

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Intel
Intel
1 day ago

Physical Design Engineer

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Job Summary

Translate RTL to GDS for custom IP and SoC designs, building manufacturing-ready physical design databases. Own key physical design flow steps including synthesis, place and route, clock tree synthesis, floorplanning, and static timing analysis, plus power/clock distribution and reliability. Verify and sign off using formal equivalence, layout verification, electrical rule checking, and structural checks, analyzing results to drive timing, power, and area optimizations. Contribute to methodology and automation improvements.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Perform physical design implementation of custom IP and SoC designs from RTL to GDS, creating manufacturing-ready design databases.
  • •Execute physical design flow tasks including synthesis, place and route, clock tree synthesis, floorplanning, static timing analysis, and power/clock distribution.
  • •Conduct verification and signoff using formal equivalence verification, static/dynamic power integrity, layout verification, electrical rule checking, and structural design checks.
  • •Analyze results to fix violations and improve timing, power, frequency, reliability, and area for current and future product architectures.
  • •Apply expertise across physical clock design, timing closure, coverage analysis, multiple power domain analysis, synthesis, placing, routing, and DFT; support methodology and flow automation improvements.

Key Requirements

  • •Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field with 2+ years of physical design execution experience.
  • •Deep knowledge of RTL-to-GDS workflows including synthesis, place and route, and static timing analysis.
  • •Expertise in optimization techniques for power, performance, and area (PPA).
  • •Hands-on experience with industry-standard EDA tools for physical design and verification.
  • •Comprehensive knowledge of clock tree synthesis and low-power design techniques, including floorplanning and multi-power domain analysis.
Experience:2+ years
Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field
Skills:Critical thinkingProblem-solvingCommunicationOrganizational skillsCollaboration
Tech Stack:RTL-to-GDSSynthesisPlace and routeClock tree synthesisStatic timing analysisFloor planningPower/clock distributionStatic power integrityDynamic power integrityReliability verificationLayout verificationElectrical rule checkingStructural design checkingPower and noise analysisFormal equivalence verificationStatic and dynamic power integrityDFTLow-power designIndustry-standard EDA tools

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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