Senior C++ Software Engineer - Chip Design Tools
Santa Clara, Austin, Durham
Workplace: OnsiteFull time152,000 - 218,500Function: Software EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Teamwork","Collaboration","Problem-solving","Communication"]Develop, optimize, and support high-performance software tools used by design engineers for chip design and verification. Collaborate in a global team to build scalable C++/Golang utilities that analyze Verilog/C/C++-described designs, improve architecture workflows, and accelerate chip modeling and verification across multiple locations.
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