Physical Design (Backend) Technical Leader

Intel
Israel
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: bachelorsSkills: ["Problem-solving","Attention to detail","Communication","Teamwork","Mentoring"]

Lead backend physical design implementation for advanced Intel wireless products, driving VLSI physical design flows for complex chips. Define and improve design implementation flows, automation, and signoff methodologies to optimize power, performance, and area (PPA). Triage and resolve issues across place & route, timing, power, signal integrity, and manufacturability, while mentoring junior engineers and partnering with EDA vendors to evaluate new tools.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Intel
Intel
7 months ago

Physical Design (Backend) Technical Leader

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Lead backend physical design implementation for advanced Intel wireless products, driving VLSI physical design flows for complex chips. Define and improve design implementation flows, automation, and signoff methodologies to optimize power, performance, and area (PPA). Triage and resolve issues across place & route, timing, power, signal integrity, and manufacturability, while mentoring junior engineers and partnering with EDA vendors to evaluate new tools.
Location: Israel
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Sr. Manager level

Key Responsibilities

  • •Technically lead physical design flow and implementation for complex VLSI chips to ensure high performance and reliability.
  • •Define and improve design implementation flows, automation, and signoff methodologies for backend implementation.
  • •Optimize power, performance, and area (PPA) metrics using advanced techniques and tools.
  • •Analyze and resolve design issues across place and route, timing, power, signal integrity, and manufacturability.
  • •Mentor and guide junior engineers; interface with EDA vendors to evaluate and integrate new tools and technologies.

Key Requirements

  • •BSc/MSc in electrical or computer engineering.
  • •10+ years of hands-on experience in VLSI physical design with successful projects on advanced technology nodes.
  • •Strong knowledge of physical design implementation flows (floorplanning, placement, routing, and timing closure).
  • •Proficiency with Synopsys EDA tools (Cadence is an advantage).
  • •Experience with STA, IR drop, EM analysis, DRC/LVS, ECO flows, and PPA optimization; knowledge of Python, Perl, or TCL scripting.
  • •Experience managing and mentoring technical teams.
  • •Excellent problem-solving skills, attention to detail, and communication teamwork.
Experience:10+ yearsVLSI physical designWireless products
Education:Bachelor's in Electrical or computer engineering
Skills:Problem-solvingAttention to detailCommunicationTeamworkMentoring
Tech Stack:Synopsys EDACadencePythonPerlTCLSTAIR dropEM analysisDRC/LVSECO

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
WebsiteLinkedInGlassdoor