Lead Design Engineer

Cadence Design Systems
Bengaluru
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Skills: ["C","Verilog","RTL","Shell scripting","Perl","Python","Tcl","Debugging","Microcontrollers","EDA tools"]

Lead the front-end DDR PHY IP design effort by developing firmware for DDR5 PHYs on microcontrollers, writing bare-metal C, and collaborating with hardware teams to derive training algorithms and co-verify firmware-hardware systems. The role involves RTL-based firmware debugging, silicon bring-up, and leveraging scripting (Shell/Perl/Python/TCL) and verification tools to ensure robust, high-speed interfaces.

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FursaFursa
Cadence Design Systems
Cadence Design Systems
7 months ago

Lead Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 13 hours agoStatus: Live
Reposted: similar role first listed 1 year ago

Job Summary

Lead the front-end DDR PHY IP design effort by developing firmware for DDR5 PHYs on microcontrollers, writing bare-metal C, and collaborating with hardware teams to derive training algorithms and co-verify firmware-hardware systems. The role involves RTL-based firmware debugging, silicon bring-up, and leveraging scripting (Shell/Perl/Python/TCL) and verification tools to ensure robust, high-speed interfaces.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Develop firmware for DDR5 PHY using microcontrollers and bare-metal programming
  • •Collaborate with hardware designers and memory subsystem architects to derive training algorithms and implement them
  • •Work with the verification team to plan firmware-hardware co-verification
  • •Develop and debug firmware in RTL-based hardware simulations (C + Verilog)
  • •Debug on silicon bring-up boards and integrate with test environments

Key Requirements

  • •Experience developing bare-metal firmware for high-speed SerDes or memory interface PHYs
  • •Strong C programming skills for embedded software development and debugging on microcontroller subsystems
  • •Knowledge of DDR5 JEDEC specifications and DIMM configurations
  • •Experience debugging RTL simulations involving firmware and microcontroller subsystems
  • •Proficiency in Shell/Perl/Python/TCL scripting and familiarity with verification EDA tools
Experience:Embedded systemsFirmwareDDR5
Skills:CVerilogRTLShell scriptingPerlPythonTclDebuggingMicrocontrollersEDA tools
Tech Stack:CVerilogRTLShellPerlPythonTCLEDA toolsMicrocontrollersDDR5

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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