Principal Engineer

Broadcom
Shanghai
Workplace: OnsiteFull timeFunction: Communications, PR & CommunityEducation: mastersSkills: ["Perl","Python","Tcl","DC","DCT","DCG","STA","DRC","LVS","Floorplanning","Synthesis"]

Lead ASIC design activities for 5nm/3nm CMOS cell-based ASICs, spanning RTL analysis, synthesis, timing verification, physical design, and post-prototype support. Collaborate with internal/external customers to deliver state-of-the-art IC solutions, including full-chip synthesis/STA, floorplanning, and DRC/LVS. Strong problem-solving and communication skills required; familiarity with advanced design flows a plus.

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FursaFursa
Broadcom
Broadcom
2 months ago

Principal Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 28 days agoStatus: Live

Job Summary

Lead ASIC design activities for 5nm/3nm CMOS cell-based ASICs, spanning RTL analysis, synthesis, timing verification, physical design, and post-prototype support. Collaborate with internal/external customers to deliver state-of-the-art IC solutions, including full-chip synthesis/STA, floorplanning, and DRC/LVS. Strong problem-solving and communication skills required; familiarity with advanced design flows a plus.
Location: Shanghai
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Manager level

Key Responsibilities

  • •Lead ASIC design activities across RTL analysis, synthesis, timing verification, and physical design.
  • •Perform full-chip synthesis and STA and manage constraint clean-up flows for 5nm/3nm designs.
  • •Oversee physical design implementation including floor planning, placement, design closure, and DRC/LVS.
  • •Collaborate with cross-functional teams and customers to ensure design requirements are met and designs are tape-out ready.
  • •Contribute to design verification and post-prototype test support to ensure silicon success.

Key Requirements

  • •Candidates should have a strong understanding of ASIC design flow and a solid VLSI background.
  • •Candidates should be able to handle block-level/top-level tasks independently.
Experience:SemiconductorASICVLSIIC design
Education:Master's in Microelectronics or related discipline
Skills:PerlPythonTclDCDCTDCGSTADRCLVSFloorplanningSynthesis
Tech Stack:PerlPythonTclDCDCTDCGSTADRCLVSFloorplanningSynthesis

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn