Senior SoC Power Modeling Engineer

AMD
Austin
Workplace: HybridFull timeFunction: Energy & Utilities OperationsEducation: bachelorsSkills: ["Problem-solving","Collaboration","Attention to detail","Analytical","Cross-functional teamwork"]

Join AMD’s Radeon Technologies Group as a senior DFT-focused engineer delivering design-for-test architectures for complex ASIC/SoC designs. You will drive DFT implementation and validation, collaborate across Architecture, RTL, Physical Design, and Product Engineering, and influence DFT strategy to improve test quality, manufacturing yield, and first-pass silicon bring-up.

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FursaFursa
AMD
AMD
2 months ago

Senior SoC Power Modeling Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live
Reposted: similar role first listed 6 months ago

Job Summary

Join AMD’s Radeon Technologies Group as a senior DFT-focused engineer delivering design-for-test architectures for complex ASIC/SoC designs. You will drive DFT implementation and validation, collaborate across Architecture, RTL, Physical Design, and Product Engineering, and influence DFT strategy to improve test quality, manufacturing yield, and first-pass silicon bring-up.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Energy & Utilities Operations
Seniority: Sr. Manager level

Key Responsibilities

  • •Define, implement, and validate DFT architectures for complex ASIC and SoC designs.
  • •Develop and integrate DFT features including scan compression, boundary scan, JTAG, and memory BIST solutions.
  • •Perform scan insertion, DFT synthesis, and ATPG pattern generation to achieve manufacturing test goals.
  • •Verify ATPG patterns through gate-level simulation and debug test-related issues throughout the design cycle.
  • •Analyze test coverage, fault models, and manufacturing test effectiveness, driving improvements in quality and test cost.

Key Requirements

  • •Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
  • •Strong foundation in DFT methodologies including scan-based test, ATPG, and silicon debug.
  • •Hands-on experience with industry-standard DFT/ATPG tools such as Synopsys DFTMAX/TetraMAX or Siemens EDA Tessent/TestKompress.
  • •Proficiency in Verilog/SystemVerilog and scripting languages such as Perl, Python, Tcl, or Shell.
  • •Experience with gate-level simulation and test pattern validation (e.g., using Synopsys VCS).
Experience:SemiconductorsDFTSoCASIC
Education:Bachelor's
Skills:Problem-solvingCollaborationAttention to detailAnalyticalCross-functional teamwork
Languages:English
Tech Stack:VerilogSystemVerilogVerilog-AMSPerlPythonTclShellVCSDFTMAXTetraMAXTessentJTAGScanBoundary scanMemory BISTATPG

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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