HIG-HBM ENGINEERING MANAGER - LAYOUT

Micron Technology
Guadalajara
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 15+ yearsSkills: ["Mentoring","Communication","Stakeholder management","Quality oversight","Collaboration"]

Lead a distributed team in Micron’s High Bandwidth Memory (HBM) organization to develop critical analog, mixed-signal, and custom layouts. Own layout verification and quality reviews (LVS, DRC, antenna checks), ensure timely block-level deliverables, and coordinate planning, scheduling, and delegation across multiple concurrent projects. Mentor layout engineers and perform detailed sub-block reviews while collaborating with global engineering teams to align execution worldwide.

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Micron Technology
Micron Technology
1 month ago

HIG-HBM ENGINEERING MANAGER - LAYOUT

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Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live

Job Summary

Lead a distributed team in Micron’s High Bandwidth Memory (HBM) organization to develop critical analog, mixed-signal, and custom layouts. Own layout verification and quality reviews (LVS, DRC, antenna checks), ensure timely block-level deliverables, and coordinate planning, scheduling, and delegation across multiple concurrent projects. Mentor layout engineers and perform detailed sub-block reviews while collaborating with global engineering teams to align execution worldwide.
Location: Guadalajara
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Manager level

Key Responsibilities

  • •Manage a team developing critical layouts for analog circuits, mixed-signal components, and custom blocks, including full-chip-level integration support.
  • •Oversee layout verification including LVS, DRC, antenna checks, documentation, and quality reviews.
  • •Ensure timely, high-quality delivery of block-level layouts meeting project requirements.
  • •Coordinate planning, area/time estimation, scheduling, task delegation, and execution across multiple concurrent projects.
  • •Mentor layout engineers, perform detailed sub-block reviews, and collaborate with global engineering teams for alignment.

Pay and Benefits

Perks:Paid LeaveLearning BudgetWellness StipendHealth InsuranceEquityRecognition

Key Requirements

  • •15+ years of analog/custom layout design experience in advanced CMOS technology nodes (Planar, FinFET).
  • •5+ years of experience managing layout engineering teams.
  • •Bachelor’s degree, Master’s degree, or equivalent experience in Electronics, VLSI Engineering, or related fields.
  • •Expertise with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS.
  • •Hands-on experience with critical IP blocks (e.g., PLL, ADC, DAC) and layout fundamentals affecting speed, area, power, and performance.
Experience:15+ years
Education:
Skills:MentoringCommunicationStakeholder managementQuality oversightCollaboration
Tech Stack:Cadence VLE/VXLMentor Graphics CalibreLVSDRCPythonSKILLTclAntenna checks

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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