Cadence Design Systems

4 months ago

IC RTL2GDS Architect, AE

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Lead as a technical architect in Cadence’s North America Field Applications Team, driving customer engagements and influencing next‑gen EDA and Agentic-AI solutions. Manage design convergence across advanced nodes (3nm and below), collaborate with cross‑functional teams, and champion Cadence tools and methodologies to deliver state‑of‑the‑art design solutions for leading semiconductor companies.

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Technical Expertise: Lead technical engagements with customers and partners to achieve best-in-class PPA, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes.
•Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
•Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.
•Thought Leadership: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.
•Leadership & Customer Success: Lead large-scale technical programs and drive customer success at executive levels.

Pay and Benefits

Perks:401kMedicalDentalVisionEquity

Key Requirements

•15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.
•BS/MS in Electrical Engineering, Computer Engineering, or related field.
•Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems.
•Proven track record of leading technical teams and driving customer success at executive levels.
•Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
•Prior experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus) and competitive solutions highly desirable.

Experience:15+ yearsSemiconductorsEDAIC design

Education:Master's

Skills:CommunicationLeadershipNegotiationInfluencePresentation

Languages:English

Tech Stack:TclPythonPerlGenusInnovusTempusVoltusConformalCerebrusSynthesisP&RSTA

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

4 months ago

IC RTL2GDS Architect, AE

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Location: San Jose

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Technical Expertise: Lead technical engagements with customers and partners to achieve best-in-class PPA, guiding adoption of Cadence’s digital implementation, signoff technologies and AgenticAI features across advanced nodes.
•Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
•Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.
•Thought Leadership: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.
•Leadership & Customer Success: Lead large-scale technical programs and drive customer success at executive levels.

Pay and Benefits

Perks:401kMedicalDentalVisionEquity

Key Requirements

•15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.
•BS/MS in Electrical Engineering, Computer Engineering, or related field.
•Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems.
•Proven track record of leading technical teams and driving customer success at executive levels.
•Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
•Prior experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus) and competitive solutions highly desirable.

Experience:15+ yearsSemiconductorsEDAIC design

Education:Master's

Skills:CommunicationLeadershipNegotiationInfluencePresentation

Languages:English

Tech Stack:TclPythonPerlGenusInnovusTempusVoltusConformalCerebrusSynthesisP&RSTA

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor