Senior ASIC Engineer

Cisco
San Jose
Workplace: OnsiteFull timeUSD 167,700 - 245,200 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 7+ yearsEducation: bachelorsSkills: ["Leading verification methodology","Code review","Debugging","Power optimization","Collaboration"]

Design, architect, and verify high-performance ASICs for Cisco’s Common Hardware Group. Own complex hardware areas, drive reusable code and lab bring-up, and debug issues across ASIC, software, and hardware levels. Lead design/DV work, establish and refine verification methodologies in UVM, perform platform-level code reviews, and develop power-saving solutions. Work onsite in San Jose 4 days per week.

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FursaFursa
Cisco
Cisco
1 day ago

Senior ASIC Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live

Job Summary

Design, architect, and verify high-performance ASICs for Cisco’s Common Hardware Group. Own complex hardware areas, drive reusable code and lab bring-up, and debug issues across ASIC, software, and hardware levels. Lead design/DV work, establish and refine verification methodologies in UVM, perform platform-level code reviews, and develop power-saving solutions. Work onsite in San Jose 4 days per week.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Drive definition, architecture, design, and verification of high-performance ASICs.
  • •Own complex or multiple functional areas and develop reusable code for future projects.
  • •Debug at ASIC, SW, and HW levels and lead chip-level issue resolution participation.
  • •Define new verification methodologies and help with lab bring-up.
  • •Identify, design, and implement power saving solutions.

Pay and Benefits

Salary: USD 167,700 - 245,200 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kParental LeaveDisability CoverageLife InsuranceEquity

Key Requirements

  • •Bachelors with 7 years of related experience, or Masters with 4 years, or PhD with 2 years.
  • •Experience with ASIC design and verification processes, including SystemVerilog.
  • •Experience debugging at ASIC, SW, and HW levels, plus verification methodology and tools.
  • •Experience developing/using verification methodologies in UVM for clusters/subsystems or full-chip level.
  • •Experience with emulation platforms such as Veloce, Palladium, Zebu, or HAPS.
Experience:7+ yearsAI hardwareASICSemiconductorNetworking
Education:Bachelor's
Skills:Leading verification methodologyCode reviewDebuggingPower optimizationCollaboration
Tech Stack:ASICSystem VerilogUVMVelocePalladiumZebuHAPSLinuxC/C++PythonPerlEmulationNetworking

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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